var config_benchs = [ 
  [ "BitNot-I (N)",     function(a) { return ~a; },    [ 333 ] ],
  [ "BitNot-I (T)",     function(a) { return ~a; },    [ %Taint(333) ] ],
  [ "uAdd-I (N)",       function(a) { return +a; },    [ 333 ] ],
  [ "uAdd-I (T)",       function(a) { return +a; },    [ %Taint(333) ] ],
  [ "uSub-I (N)",       function(a) { return -a; },    [ 333 ] ],
  [ "uSub-I (T)",       function(a) { return -a; },    [ %Taint(333) ] ],
  [ "uIncPre-I (N)",    function(a) { return ++a; },   [ 333 ] ],
  [ "uIncPre-I (T)",    function(a) { return ++a; },   [ %Taint(333) ] ],
  [ "uDecPre-I (N)",    function(a) { return --a; },   [ 333 ] ],
  [ "uDecPre-I (T)",    function(a) { return --a; },   [ %Taint(333) ] ],
  [ "uIncPost-I (N)",   function(a) { return a++; },   [ 333 ] ],
  [ "uIncPost-I (T)",   function(a) { return a++; },   [ %Taint(333) ] ],
  [ "uDecPost-I (N)",   function(a) { return a--; },   [ 333 ] ],
  [ "uDecPost-I (T)",   function(a) { return a--; },   [ %Taint(333) ] ],
  [ "BitNot-D (N)",     function(a) { return ~a; },    [ 1.1 ] ],
  [ "BitNot-D (T)",     function(a) { return ~a; },    [ %Taint(1.1) ] ],
  [ "uAdd-D (N)",       function(a) { return +a; },    [ 1.1 ] ],
  [ "uAdd-D (T)",       function(a) { return +a; },    [ %Taint(1.1) ] ],
  [ "uSub-D (N)",       function(a) { return -a; },    [ 1.1 ] ],
  [ "uSub-D (T)",       function(a) { return -a; },    [ %Taint(1.1) ] ],
  [ "uIncPre-D (N)",    function(a) { return ++a; },   [ 1.1 ] ],
  [ "uIncPre-D (T)",    function(a) { return ++a; },   [ %Taint(1.1) ] ],
  [ "uDecPre-D (N)",    function(a) { return --a; },   [ 1.1 ] ],
  [ "uDecPre-D (T)",    function(a) { return --a; },   [ %Taint(1.1) ] ],
  [ "uIncPost-D (N)",   function(a) { return a++; },   [ 1.1 ] ],
  [ "uIncPost-D (T)",   function(a) { return a++; },   [ %Taint(1.1) ] ],
  [ "uDecPost-D (N)",   function(a) { return a--; },   [ 1.1 ] ],
  [ "uDecPost-D (T)",   function(a) { return a--; },   [ %Taint(1.1) ] ],
];

benchs = benchs.concat(init_benchs(config_benchs))
